Posts

Showing posts from March, 2026

Containerizing ROS: Why Every Robotics Engineer Needs to Learn Docker

Robotics DevOps · Docker · ROS 2 Containerizing ROS: Why Every Robotics Engineer Needs to Learn Docker By YOUR NAME  ·  April 26, 2026  ·  12 min read New to Docker?   Download Docker Desktop free →  |  Best-rated Docker course on Udemy ↗ 🐳 Replace this block with your hero image Recommended: 1200 × 630 px illustration of Docker + ROS robot arm Ad · Blogger Layout AdSense Gadget recommended here If you have spent more than a week working with the Robot Operating System (ROS), you have inevitably uttered the most dangerous phrase in engineering: "But it works on my machine!" Robotics is rapidly adopting a Software Defined Hardware paradigm. As systems grow more complex — integrating AI, computer vision, and intricate motion planning — managing software environments across different developers, simulators, and physical robots has become a serious challenge. The solution? Docker. Who...

From Netlist to Silicon: Place and Route with NextPNR on WSL

  From Netlist to Silicon: Place and Route with NextPNR on WSL Welcome back to the final installment of our AppliedKaos beginner series on low-latency FPGA design! In Part 1, we wrote and simulated a SystemVerilog glitch filter. In Part 2, we used Yosys to synthesize that code into a generic hardware netlist—proving our logic was physically buildable. Today, we cross the finish line. We are going to take that generic netlist, map it to a specific physical FPGA chip, and generate the final binary file (the bitstream ) that makes the hardware tick. To do this, we’ll use NextPNR and the Project IceStorm tools, remaining entirely within our open-source WSL Ubuntu 22.04 ecosystem. The Final Hurdles: PnR and Bitstreams Before we dive into the commands, let's clarify what is actually happening in this final stage. What is Place and Route (PnR)? Yosys gave us a netlist of logic gates and flip-flops, but it didn't tell us where those components should physically sit on the FPGA die...